Packaging design engineer

Department: Research Institute required: 1

Required arrival time: as soon as possible salary range: Negotiable


1. Be responsible for the design, structure design and BOM selection of chip packaging substrate;

2. Responsible for FC and sip package selection, uate and analyze the feasibility of package scheme, and optimize the package scheme;

3. Independently complete the design of IC and MEMS product packaging structure, draw engineering drawings, and be able to uate the drawings of vehicles, clamps and other tooling required for processing products;

4. Carry out technical exchanges related to design with substrate suppliers and customers;

5. Complete other tasks assigned by the superior.


  1. Major in microelectronics, machinery, materials, electronic information and science;
  2. Bachelor degree or above, especially excellent can be relaxed;
  3. At least eight years of packaging design experience in junior college, five years of packaging design experience in bachelor's degree, and three years of packaging design experience in master's degree;
  4. Familiar with semiconductor packaging process and technology, independently complete FC, SIP chip packaging design;
  5. Familiar with SIP chip reliability test standard, able to propose product improvement plan according to test results;
  6. Proficient in AutoCAD, cadence and other design related software;
  7. Have a certain foundation in English;
  8. Electric simulation ability is preferred;
  9. Good communication and problem analysis skills, meticulous and rigorous;
  10. Have strong sense of responsibility, learning ability, coordination ability and team work consciousness, and can bear certain work pressure;
  11.  Hunan / Hubei / Jiangxi people are particularly good.



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